To improve the integration degree of semiconductor devices, currently a semiconductor chip typically includes several layers of semiconductor structures, and the formation process of each layer of semiconductor structure takes at least one or more photolithography processes to form the patterns and doping regions of the semiconductor structure.
To improve the resolution of the photolithography process, existing exposure equipment often includes a stepper or a scanner. The light source of the exposure equipment passes through a projection mask and, after being reduced proportionally, illuminates a part of a wafer. Thus, exposure of the entire wafer requires repeated exposures of several parts of the wafer. Further, because there might be errors overlaying the mask pattern with the wafer in multiple exposures, the mask pattern and the wafer need to be aligned before every exposure of the wafer.
In the existing exposure equipment, to align the projection mask with the wafer, before the exposure process, the offset between the projection mask and the wafer to be exposed is measured at different positions to obtain an alignment model for the entire wafer to be exposed. When a portion of the wafer needs to be exposed, the wafer is aligned using the alignment model such that the projection mask can overlay the exposure portion of the wafer. The wafer can then be exposed using the projection mask.
However, in the lithography process, such alignment model may be unable to completely solve the existing problem that the wafer often cannot be aligned with the projection mask with desired accuracy. Often, certain portions of the wafer may have a high alignment precision, while certain other portions of the wafer may have a low alignment precision. The disclosed methods and systems are directed to solve one or more problems set forth above and other problems.